This invention generally relates to a measurement circuit for the evaluation of a Digital to Analog Converter (DAC). More particularly, this invention relates to a dynamic measurement circuit for a DAC.
DACs produce analog output signals which correspond to digital input words. The amplitude of the output signal of the DAC must accurately correspond to the input digital word. Accordingly, the evaluation of the accuracy of a DAC has been important during design, manufacturing or before use of the DAC. The evaluation measurement can be performed by providing digital data words to a DAC under DC conditions and measuring the output signals with a digital voltmeter to obtain its dynamic characteristics. Such evaluation measurements have to date been performed by one of the two methods described below.
FIG. 3 depicts the input and output waveforms characteristic of one measurement circuit for DAC evaluation known in the prior art. Waveform A represents input data words and waveform B represents the output analog signals from the DAC. After delay time ts, which allows the output analog signal to stabilize after the generating input word changes, the output signal is sampled and the sampled value is reconverted to a digital value by an analog-to-digital converter (ADC) using the same conversion scale used in the DAC. The delay time ts can be adjusted, in increments of one nanosecond, by using a programmable delay line, so a number of different points in output analog signals can be sampled.
However, this method is subject to some unavoidable disadvantages. First, to obtain accurate measurements in high speed operation, the sampling and reconversion must be done with accuracy at least comparable to and preferably better than that of the DAC being tested, so that high quality, expensive ADC and sample-and-hold circuits are necessary. Second, a programmable delay line must be used to produce sampling delay time ts. Thus the accuracy and resolution of delay time ts is completely dependant on the performance characteristics of the programmable delay line. This makes it quite difficult to adjust accurately the delay time by increments on the order of 10 nanoseconds. Third, although the delay time ts must be adjusted to suit the characteristics of the DAC under evaluation, the flexibility of this adjustment is also limited by the characteristics of the programmable delay line so that ts cannot be adjusted simply and independently.
FIG. 4 illustrates another method for DAC measurement used in the prior art. In order to obtain output signals from a DAC in the form of a pseudo-sine wave, a corresponding periodic series of digital words is provided as input to the DAC while the DAC operates at a high conversion rate. The staircase output signals are passed through a low pass filter (LPF) for smoothing to produce a sine wave output. The evaluation of the DAC is performed by analyzing the output analog signal as a sine wave, measuring the noise and distortion introduced into the output analog signal.
This method also has some inherent disadvantages. When distortion appears in the output analog signal, it is difficult or impossible to determine the precise failure location with respect to the digital step input. The failures or inaccuracy of the DAC may be obscured by passing the signal through the low pass filter, so that proper evaluation for DAC with its true characteristics cannot always be assured.